专利名称：Method for fabricating IGFET integrated
circuits
发明人：Hung-Fai S. Law,Alexander D. Lopez申请号：US06/108289申请日：19791228公开号：US04319396A公开日：19820316
摘要：A rapid and systematic method for performing chip layout of a random- logicIGFET circuit includes steps for arranging the device features and interconnectionfeatures corresponding to the circuit in respective positions in an array of intersectingrows and columns. The method provides layouts of device and interconnection featureshaving a high packing density and a high degree of order and regularity to facilitatechecking for layout errors.
申请人：BELL TELEPHONE LABORATORIES, INCORPORATED
代理人：Arthur J. Torsiglieri
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