Interface system

专利名称：Interface system发明人：斎藤 利忠,藤本 曜久申请号：JP2016206337申请日：20161020公开号：JP6640696B2公开日：20200205

摘要：PROBLEM TO BE SOLVED: To propose a system having low standby power andcapable of fast recovery.SOLUTION: The interface system according to the embodimentincludes a receiver 23 that receives a first clock RCLK and serial data D0 from a host, afirst clock generator 24 that includes a first VCO and generates a second clock CLK0based on the first clock RCLK, a second clock generator 25 that includes a second VCOand generates a third clock CLK1 based on the serial data D0, and a sampling circuit 26that samples received data based on the second clock CLK1 and the serial dataD0.SELECTED DRAWING: Figure 2

申请人：キオクシア株式会社

地址：東京都港区芝浦三丁目１番２１号

国籍：JP

代理人：特許業務法人スズエ国際特許事務所

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