NCP5181
High Voltage High and LowSide Driver
The NCP5181 is a High Voltage Power MOSFET Driver providingtwo outputs for direct drive of 2 N−channel power MOSFETs arrangedin a half−bridge (or any other high−side + low−side) configuration.It uses the bootstrap technique to insure a proper drive of theHigh−side power switch. The driver works with 2 independent inputsto accommodate any topology (including half−bridge, asymmetricalhalf−bridge, active clamp and full−bridge…).
Features
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IN_HIIN_LOGNDDRV_LO
VBOOTDRV_HIBRIDGEVCC
•••••••••••••
High Voltage Range: up to 600 VdV/dt Immunity ±50 V/nsec
Gate Drive Supply Range from 10 V to 20 VHigh and Low DRV Outputs
Output Source / Sink Current Capability 1.1 A / 2.4 A3.3 V and 5 V Input Logic CompatibleUp to VCC Swing on Input Pins
Matched Propagation Delays between Both ChannelsOutputs in Phase with the Inputs
Independent Logic Inputs to Accommodate All TopologiesUnder VCC LockOut (UVLO) for Both ChannelsPin to Pin Compatible with IR2181(S)These are Pb−Free Devices
81SOIC−8D SUFFIXCASE 751
PDIP−8P SUFFIXCASE 626
MARKING DIAGRAMS
85181ALYWX G1NCP5181P,5181= Specific Device CodeA= Assembly LocationL= Wafer LotY, YY= Year
W, WW= Work WeekG, G= Pb−Free Package
NCP5181P
AWL YYWWGApplications
•High Power Energy Management•Half−bridge Power Converters
•Any Complementary Drive Converters (asymmetrical half−bridge,••
active clamp)
Full−bridge Converters
Bridge Inverters for UPS Systems
PIN ASSIGNMENT
PININ_HIIN_LOGNDDRV_LOVCCVBOOTDRV_HIBRIDGE
FUNCTION
Logic Input for High Side Driver Output In PhaseLogic Input for Low Side Driver Output In PhaseGround
Low Side Gate Drive OutputLow Side and Main Power SupplyBootstrap Power SupplyHigh Side Gate Drive Output
Bootstrap Return or High Side Floating Supply Return
ORDERING INFORMATION
DeviceNCP5181PGNCP5181DR2G
PackagePDIP−8(Pb−Free)SOIC−8(Pb−Free)
Shipping†50 Units/Tube2.500/Tape & Reel
†For information on tape and reel specifications,including part orientation and tape sizes, pleaserefer to our Tape and Reel Packaging SpecificationBrochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 20061
March, 2006 − Rev. 2
Publication Order Number:
NCP5181/D
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NCP5181
VbulkC1GNDC35 SG3526MC34025 TL594GNDGND123GNDVCCU1VBOOTIN_HIDRV_HIIN_LOBridgeGNDDRV_LONCP51XXD4C4Q1C3Out−Q2C6D2C5T18764VCCD1L1Out+GNDU2R1D3GNDFigure 1. Typical Application
VCCVCCUVDETECTVBOOTIN_HI PULSETRIGGER LEVELSHIFTERGNDSRQQDRV_HIGNDUVDETECTVCCBRIDGEIN_LODELAYDRV_LOGNDGNDGNDGNDFigure 2. Detailed Block Diagram
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NCP5181
MAXIMUM RATINGS
Rating
Main power supply voltageVHV: High Voltage BRIDGE pinVHV: Floating supply voltageVHV: High side output voltageLow side output voltageAllowable output slew rateInputs IN_HI, IN_LO
ESD Capability:
HBM model (all pins except pins 6−7−8)Machine model (all pins except pins 6−7−8)Latch up capability per Jedec JESD78
Power dissipation and thermal characteristicsPDIP8: Thermal resistance, Junction−to−AirSO−8: Thermal resistance, Junction−to−AirOperating junction temperature
RqJARqJATJ_minTJ_max
100178−55+150
°C/W
SymbolVCCVBRIDGEVBOOT − VBRIDGE
VDRV_HIVDRV_LOdVBRIDGE/dtVIN_XX
Value−0.3 to 20−1 to 6000 to 20
VBRIDGE−0.3 to VBOOT+0.3
−0.3 to VCC+0.3
50
−1.0 to VCC+0.3
2.0200
UnitVVVVVV/nsVkVV
°C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limitvalues (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,damage may occur and reliability may be affected.
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NCP5181
ELECTRICAL CHARACTERISTICS (VCC = Vboot = 15 V, Vgnd = Vbridge, −40°C < TA < 125°C, Outputs loaded with 1 nF)
Rating
Symbol
TA −40°C to 125°C
Units
OUTPUT SECTION
Min
Output high short circuit pulsed currentVDRV = 0 V, PW ≤ 10 ms, (Note 1)Output low short circuit pulsed currentVDRV = VCC, PW ≤ 10 ms, (Note 1)Output resistor (Typical value @ 25°C only)
SourceOutput resistor (Typical value @ 25°C only)
Sink
IDRVhighIDRVlowROHROL
−−−−
Typ1.42.252
Max−−128
AAWW
DYNAMIC OUTPUT SECTION
Rating
Turn−on propagation delay (Vbridge = 0 V)
Turn−off propagation delay (Vbridge = 0 V or 50 V) (Note 2)Output voltage rise time
(from 10% to 90% @ VCC = 15 V) with 1 nF loadOutput voltage falling edge
(from 90% to 10% @ VCC = 15 V) with 1 nF load
Propagation delay matching between the High side and the Low side@ 25°C (Note 3)Minimum input pulse width that changes the output
SymboltONtOFFtrtfDttPW
Min−−−−−−
Typ100100402020−
Max170170604035100
Unitsnsnsnsnsnsns
INPUT SECTION
Low level input voltage thresholdInput pull−down resistor (VIN < 0.5 V)High level input voltage threshold
VINRINVIN
−−2.3
−200−
0.8−−
VkWV
SUPPLY SECTION
VCC UV Start−up voltage thresholdVCC UV Shut−down voltage thresholdHysteresis on VCC
Vboot Start−up voltage threshold reference to bridge pin (Vboot_stup = Vboot − Vbridge)Vboot UV Shut−down voltage thresholdHysteresis on Vboot
Leakage current on high voltage pins to GND (VBOOT = VBRIDGE = DRV_HI = 600 V)
Consumption in active mode
(VCC = Vboot, fsw = 100 kHz and 1 nF load on both driver outputs)Consumption in inhibition mode (VCC = Vboot)VCC current consumption in inhibition modeVboot current consumption in inhibition mode
VCC_stupVCC_shtdwnVCC_hystVboot_stupVboot_shtdwnVboot_shtdwnIHV_LEAKICC1ICC2ICC3ICC4
7.97.30.37.97.30.3−−−−−
8.98.20.78.98.20.70.54.525021535
9.89.0−9.89.0−406.5400−−
VVVVVVmAmAmAmAmA
*Note: see also characterization curves1.Guaranteed by design.
2.Turn−off propagation delay @ Vbridge = 600 V is guaranteed by design
3.See characterization curve for Dt parameters variation on the full range temperature.4.Timing diagram definition see Figures 4, 5 and 6.
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NCP5181
IN_HIIN_LO
DRV_HIDRV_LO
Figure 3. Input/Output Timing Diagram
IN_HIIN_LO
ton
50%50%
tr
toff
90%
90%
tf
DRV_HIDRV_LO
10%10%
Figure 4. Switching Time Waveform Definitions
IN_LOIN_HI
50%
ton
Delta_t
50%
toff90%
10%
DRV_HI
toff90%
DRV_LO
Delta_tton
10%
Figure 5. Delay Matching Waveforms Definition
IN_LO&IN_HI
50%
ton_HI
Delta_t
50%
toff_HI90%
10%
Delta_t
DRV_HI
ton_LO
ton_LO
DRV_LO
10%
90%
Figure 6. Other Delay Matching Waveforms Definition
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NCP5181
TYPICAL CHARACTERISTICS
160Ton PROPAGATION DELAY (ns)Ton PROPAGATION DELAY (ns)140120100806040200−40−20020406080100120ton High Sideton Low Side140ton High Side120100806040200101214161820TEMPERATURE (°C)SUPPLY VOLTAGE; VCC = Vboot (V)ton Low SideFigure 7. Turn−on Propagation Delay vs.Temperature180Toff PROPAGATION DELAY (ns)toff High SideToff PROPAGATION DELAY (ns)160140120100806040200−40−20020406080100120toff Low Side160140120100806040200Figure 8. Turn−on Propagation Delay vs. VCCVoltage (VCC = Vboot)toff High Sidetoff Low Side101214161820TEMPERATURE (°C)SUPPLY VOLTAGE; VCC = Vboot (V)Figure 9. Turn−off Propagation Delay vs.Temperature130Ton PROPAGATION DELAY (ns)Toff PROPAGATION DELAY (ns)130Figure 10. Turn−off Propagation Delay vs. VCCVoltage (VCC = Vboot)110110909070705001020304050BRIDGE PIN VOLTAGE (V)
5001020304050BRIDGE PIN VOLTAGE (V)
Figure 11. High Side Turn−on Propagation
Delay vs. VBRIDGE VoltageFigure 12. High Side Turn−off Propagation
Delay vs. VBRIDGE Voltage
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NCP5181
TYPICAL CHARACTERISTICS
4035TURN−ON RISE TIME (ns)30252015105.00−40−20020406080100120tr Low SideTURN−ON RISE TIME (ns)tr High Side3530252015105.00101214161820TEMPERATURE (°C)SUPPLY VOLTAGE; VCC = Vboot (V)tr High Sidetr Low SideFigure 13. Turn−on Rise Time vs. Temperature30TURN−OFF FALL TIME (ns)TURN−OFF FALL TIME (ns)252015105.00−40tf High Side2018tf Low Side161412108.06.04.02.00−20020406080100120Figure 14. Turn−on Rise Time vs. VCC Voltage(VCC = Vboot)tf Low Sidetf High Side101214161820TEMPERATURE (°C)
SUPPLY VOLTAGE; VCC = Vboot (V)
Figure 15. Turn−off Fall Time vs. Temperature
4035302520151050−40
−20
0
20
40
60
Figure 16. Turn−off Fall Time vs. VCC Voltage
(VCC = Vboot)
PROPAGATION DELAY MATCHING (ns)80100120
TEMPERATURE (°C)
Figure 17. Propagation Delay MatchingBetween High Side and Low Side Driver
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NCP5181
TYPICAL CHARACTERISTICS
1.41.21.00.80.60.40.20−40
−20
0
20
40
60
80
100
120
1.41.21.00.80.60.40.2010
12
14
16
18
20
LOW LEVEL INPUT VOLTAGE THRESHOLD (V)TEMPERATURE (°C)
LOW LEVEL INPUT VOLTAGE THRESHOLD (V)SUPPLY VOLTAGE; VCC = Vboot (V)
Figure 18. Low Level Input Voltage Threshold
vs. Temperature
2.5HIGH LEVEL INPUT VOLTAGETHRESHOLD (V)2.0
HIGH LEVEL INPUT VOLTAGETHRESHOLD (V)2.52.0
Figure 19. Low Level Input Voltage Threshold
vs. VCC Voltage
1.51.5
1.01.0
0.50−40
0.50
−20020406080100120101214161820
TEMPERATURE (°C)
SUPPLY VOLTAGE; VCC = Vboot (V)
Figure 20. High Level Input Voltage Threshold
vs. Temperature
LEAKAGE CURRENT TO GND (mA)4.0
HIGH SIDE LEAKAGE CURRENTTO GND (mA)3.53.02.52.01.51.00.50−40
−20
0
20406080TEMPERATURE (°C)
100
120
0.400.350.300.250.200.150.100.0500
Figure 21. High Level Input Voltage Threshold
vs. VCC Voltage
100
200300400BRIDGE PIN VOLTAGE (V)
500600
Figure 22. Leakage Current on High VoltagePins (600 V) to Ground vs. Temperature
Figure 23. Leakage Current on High Voltage
Pins to Ground vs. Vbridge Voltage
(Vbridge = Vboot = VDRV_HI)
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NCP5181
TYPICAL CHARACTERISTICS
100BOOTSTRAP SUPPLY CURRENT (mA)BOOTSTRAP SUPPLY CURRENT (mA)100
8080
6060
4040
200−40
20010
−200204060801001201214161820
TEMPERATURE (°C)BOOTSTRAP SUPPLY VOLTAGE (V)
Figure 24. High Side Supply Current vs.
Temperature
500VCC SUPPLY CURRENT (mA)VCC SUPPLY CURRENT (mA)400
500400
Figure 25. High Side Supply Current vs.
Bootstrap Supply Voltage
300300
200200
1000−40
1000
−20020406080100120101214161820
TEMPERATURE (°C)
VCC, SUPPLY VOLTAGE (V)
Figure 26. VCC Supply Current vs.
Temperature
10
UVLO SHUTDOWN VOLTAGE th (V)UVLO STARTUP VOLTAGE th (V)9.89.69.49.2Vboot UVLO stup th9.08.8VCC UVLO stup th8.68.48.28.0−40−200204060801001209.08.88.68.48.28.07.87.67.4Figure 27. VCC Supply Current vs. VCC Supply
Voltage
VCC UVLO shtdwn thVboot UVLO shtdwn th7.27.0−40−20020406080100120TEMPERATURE (°C)TEMPERATURE (°C)
Figure 28. UVLO Start Up Voltage vs.
TemperatureFigure 29. UVLO Shut Down Voltage vs.
Bootstrap Supply Voltage
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NCP5181
TYPICAL CHARACTERISTICS
35ICC + Iboot CURRENT SUPPLY (mA)3025
Rgate = 10 W2015105.000100200300400500600SWITCHING FREQUENCY (kHz)
Rgate = 0 W60ICC + Iboot CURRENT SUPPLY (mA)Cload = 2.2 nF / Q = 33 nC50
Rgate = 22 W4030201000100200300400500600SWITCHING FREQUENCY (kHz)Rgate = 10 WRgate = 0 WRgate = 22 WCload = 1 nF / Q = 15 nCFigure 30. ICC1 Consumption vs. SwitchingFrequency with 15 nC Load on Each Driver
807060504030201000100200300400500600SWITCHING FREQUENCY (kHz)
Rgate = 22 WRgate = 10 WRgate = 0 W140Figure 31. ICC1 Consumption vs. SwitchingFrequency with 33 nC Load on Each Driver
ICC + Iboot CURRENT SUPPLY (mA)ICC + Iboot CURRENT SUPPLY (mA)Cload = 3.3 nF / Q = 50 nCCload = 6.6 nF / Q = 100 nC120Rgate = 22 WRgate = 10 W100Rgate = 0 W8060402000100200300400500600SWITCHING FREQUENCY (kHz)
Figure 32. ICC1 Consumption vs. SwitchingFrequency with 50 nC Load on Each DriverFigure 33. ICC1 Consumption vs. SwitchingFrequency with 100 nC Load on Each Driver
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NCP5181
PACKAGE DIMENSIONS
SOIC−8 NBCASE 751−07ISSUE AGA85−X−B1S40.25 (0.010)MYM−Y−GKNOTES:
1.DIMENSIONING AND TOLERANCING PERANSI Y14.5M, 1982.
2.CONTROLLING DIMENSION: MILLIMETER.3.DIMENSION A AND B DO NOT INCLUDEMOLD PROTRUSION.
4.MAXIMUM MOLD PROTRUSION 0.15 (0.006)PER SIDE.
5.DIMENSION D DOES NOT INCLUDE DAMBARPROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTALIN EXCESS OF THE D DIMENSION ATMAXIMUM MATERIAL CONDITION.
6.751−01 THRU 751−06 ARE OBSOLETE. NEWSTANDARD IS 751−07.
MILLIMETERSMINMAX4.805.003.804.001.351.750.330.511.27 BSC0.100.250.190.250.401.270 _8 _0.250.505.806.20
INCHES
MINMAX0.1890.1970.1500.1570.0530.0690.0130.0200.050 BSC0.0040.0100.0070.0100.0160.0500 _8 _0.0100.0200.2280.244
C−Z−HD0.25 (0.010)
MSEATINGPLANENX 45_0.10 (0.004)MJZY
SX
SDIMABCDGHJKMNS
SOLDERING FOOTPRINT*
1.520.0607.00.2754.00.1550.60.0241.2700.050SCALE 6:1
mmǓǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering andMounting Techniques Reference Manual, SOLDERRM/D.
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NCP5181
PACKAGE DIMENSIONS
8 LEAD PDIPCASE 626−05ISSUE L85−B−14NOTES:
1.DIMENSION L TO CENTER OF LEAD WHENFORMED PARALLEL.
2.PACKAGE CONTOUR OPTIONAL (ROUND ORSQUARE CORNERS).
3.DIMENSIONING AND TOLERANCING PER ANSIY14.5M, 1982.
DIMABCDFGHJKLMNMILLIMETERSMINMAX9.4010.166.106.603.944.450.380.511.021.782.54 BSC0.761.270.200.302.923.437.62 BSC−−−10 _0.761.01INCHESMINMAX0.3700.4000.2400.2600.1550.1750.0150.0200.0400.0700.100 BSC0.0300.0500.0080.0120.1150.1350.300 BSC−−−10 _0.0300.040FNOTE 2−A−LC−T−SEATINGPLANEJNDKMMTAMHG0.13 (0.005)BMThe product described herein (NCP5181), is covered by U.S. patent: 6,362, 067. There may be some other patent pending.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further noticeto any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liabilityarising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. Alloperating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rightsnor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applicationsintended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. ShouldBuyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or deathassociated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an EqualOpportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:N. American Technical Support: 800−282−9855 Toll FreeLiterature Distribution Center for ON SemiconductorUSA/CanadaP.O. Box 61312, Phoenix, Arizona 85082−1312 USAPhone: 480−829−7710 or 800−344−3860 Toll Free USA/CanadaJapan: ON Semiconductor, Japan Customer Focus Center2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051Fax: 480−829−7709 or 800−344−3867 Toll Free USA/CanadaPhone: 81−3−5773−3850Email: orderlit@onsemi.comON Semiconductor Website: http://onsemi.comOrder Literature: http://www.onsemi.com/litorderFor additional information, please contact yourlocal Sales Representative.http://onsemi.com12NCP5181/D
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